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~ Today, Synopsys, Inc. (Nasdaq: SNPS) announced the industry's broadest portfolio of automotive-grade Interface and Foundation IP for TSMC's N5A process. This new IP is designed to meet the AEC-Q100 reliability and automotive Grade 2 temperature standards for ambient -40°C to 105°C, helping to ensure reliability of advanced driver assistance systems (ADAS), highly automated driving (HAD) systems, and zonal SoCs.
Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC said, "TSMC has worked closely with our design ecosystem partners to provide the automotive semiconductor industry with cutting-edge solutions in IP, EDA, and manufacturing technologies. Synopsys' portfolio of automotive-grade IP for TSMC's N5A process enables automotive chip innovators to accelerate the design of their safety-critical SoCs while taking advantage of N5A's significant performance, power efficiency, and logic density boost."
John Koeter, senior vice president of marketing and strategy for IP at Synopsys added that "New generations of automotive SoC designs will need to support massive amounts of safety-critical data processed at extreme speeds and with high reliability. Synopsys' high-quality, automotive-grade Interface and Foundation IP on TSMC's N5A process enables automotive OEMs, Tier 1s, and semiconductor companies to minimize IP integration risk and help meet the required functional safety, performance, and reliability levels for their SoCs."
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The ISO 26262 standard for random hardware faults is also met by Synopsys' portfolio which helps accelerate the development and assessment of safety-critical SoCs while reaching Automotive Safety Integrity Level (ASIL) targets. The Synopsys Automotive-Grade IP on the TSMC N5A process includes logic libraries, embedded memories, GPIOs, SLM PVT monitors as well as PHYs for LPDDR5X/5/4X, PCIe 4.0/5.0 10G USXGMII Ethernet MIPI C-PHY/D-PHY & M-PHY as well as USB.
Synopsys' portfolio has been integrated into more than 100 ADAS chips which are part of its automotive SoC & software development offering that includes design verification electronics digital twin & prototyping solutions to accelerate development of chips for software defined vehicles.
The new Synopsys IP is available today & provides a reliable solution for long term operation in order to power next generation software defined vehicles by enabling long term reliability & high performance compute requirements in automotive system on chips (SoCs).
Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC said, "TSMC has worked closely with our design ecosystem partners to provide the automotive semiconductor industry with cutting-edge solutions in IP, EDA, and manufacturing technologies. Synopsys' portfolio of automotive-grade IP for TSMC's N5A process enables automotive chip innovators to accelerate the design of their safety-critical SoCs while taking advantage of N5A's significant performance, power efficiency, and logic density boost."
John Koeter, senior vice president of marketing and strategy for IP at Synopsys added that "New generations of automotive SoC designs will need to support massive amounts of safety-critical data processed at extreme speeds and with high reliability. Synopsys' high-quality, automotive-grade Interface and Foundation IP on TSMC's N5A process enables automotive OEMs, Tier 1s, and semiconductor companies to minimize IP integration risk and help meet the required functional safety, performance, and reliability levels for their SoCs."
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The ISO 26262 standard for random hardware faults is also met by Synopsys' portfolio which helps accelerate the development and assessment of safety-critical SoCs while reaching Automotive Safety Integrity Level (ASIL) targets. The Synopsys Automotive-Grade IP on the TSMC N5A process includes logic libraries, embedded memories, GPIOs, SLM PVT monitors as well as PHYs for LPDDR5X/5/4X, PCIe 4.0/5.0 10G USXGMII Ethernet MIPI C-PHY/D-PHY & M-PHY as well as USB.
Synopsys' portfolio has been integrated into more than 100 ADAS chips which are part of its automotive SoC & software development offering that includes design verification electronics digital twin & prototyping solutions to accelerate development of chips for software defined vehicles.
The new Synopsys IP is available today & provides a reliable solution for long term operation in order to power next generation software defined vehicles by enabling long term reliability & high performance compute requirements in automotive system on chips (SoCs).
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